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Low-energy and area-efficient tri-level switching scheme for SAR ADC

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2 Author(s)
Yuan, C. ; Sch. of Electr. & Electron. Eng., Nanyang Technol. Univ., Singapore, Singapore ; Lam, Y.

A novel low-energy tri-level switching scheme for low-power successive approximation register (SAR) ADC is proposed. With the input common-mode voltage (Vcm) designed to be exactly half of the reference voltage (Vref), the switching energy of the proposed switching scheme is reduced by 96.89% as compared with the conventional architecture. Besides the large energy saving, the proposed switching scheme also reduces the number of capacitors in the ADC capacitor array by 75%, which in turn results in an area-efficient SAR ADC.

Published in:

Electronics Letters  (Volume:48 ,  Issue: 9 )

Date of Publication:

April 26 2012

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