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Decoder-Optimised Progressive Edge Growth Algorithms for the Design of LDPC Codes with Low Error Floors

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2 Author(s)
Healy, C.T. ; Dept. of Electron., Univ. of York, York, UK ; de Lamare, R.C.

A novel construction for irregular low-density parity-check (LDPC) codes based on a modification of the Progressive Edge Growth (PEG) algorithm is presented. Edge placement of the PEG algorithm is enhanced by use of the Sum-Product algorithm in the design of the parity-check matrix. The proposed algorithm is highly flexible in block length and rate. The codes constructed by the proposed methods are tested in the AWGN channel and significant performance improvements are achieved. The flexibility of the proposed decoder optimisation operation is then shown by its use in modifying the Improved PEG (IPEG) algorithm to achieve further performance gains.

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Communications Letters, IEEE  (Volume:16 ,  Issue: 6 )