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A 0.47–1.6 mW 5-bit 0.5–1 GS/s Time-Interleaved SAR ADC for Low-Power UWB Radios

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4 Author(s)
Pieter J. A. Harpe ; Holst Centre/imec, Eindhoven, The Netherlands ; Ben Busze ; Kathleen Philips ; Harmke de Groot

This paper presents a 16-channel time-interleaved 5-bit asynchronous SAR ADC for UWB radios. It proposes 400 aF unit capacitors, offset calibration, a self-resetting comparator and a distributed clock divider to optimize the performance. The prototype in 90 nm CMOS occupies only 0.11 mm2 including decoupling capacitors. Two relevant modes for UWB are supported: 0.5 GS/s at 0.75 V supply, and 1 GS/s at 1 V supply with 0.47 mW and 1.6 mW power consumption respectively. With an ENOB of 4.7 and 4.8 bits, this leads to energy efficiencies of 36 and 57 fJ/conversion-step. Compared to prior-art, state-of-the-art efficiency is achieved without relying on complex calibration schemes.

Published in:

IEEE Journal of Solid-State Circuits  (Volume:47 ,  Issue: 7 )