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Implementation of SOC'S audio video coprocessor

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4 Author(s)
Krishna, K.T. ; ECE Dept., KL Univ., Vaddeswaram, India ; Blessington, T.P. ; Murthy, B.B. ; Ganesh, G.V.

In many multimedia SOC applications software and data are stored in on chip memory, because of this large amount of on chip memory increases. This leads to increase in area and power dissipation of the whole chip. This tradeoff leads to the design of system on chip in order to meet the various constraints of the design. Here we design audio device based on LEON SOC platform. With the help of this design we consider to decrease the burden on the whole chip with respect to the memory, coming to the part video. It is designed to perform the computational intensive final step of MPEG-4 video decoding. The architecture consists of a control processor and multiple powerful arithmetic units that perform rendering calculations directly in hardware along with video and audio codec. This architecture is based on intra communication through AMBA bus and inter communication is supported by USB.

Published in:

Devices, Circuits and Systems (ICDCS), 2012 International Conference on

Date of Conference:

15-16 March 2012

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