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Even though vertical 3D integration offers increased device density, reduced signal delay, and design flexibility, heat and thermal concerns are, nevertheless, aggravated. In this context, accurate computation of temperature profile is required to establish thermal design rules governing the feasibility of integration options. Within this framework, a novel methodology based on discontinuous Galerkin finite element method for accurate thermal profile estimation of 3D integrated circuits is proposed. The method is utilized to simulate geometrically complicated physical structures with limited complexity overhead.