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Applying a high performance tiled rad-hard digital signal processor to spaceborne applications

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6 Author(s)
Marshall, J. ; BAE Syst., Manassas, VA, USA ; Berger, R. ; Bear, M. ; Hollinden, L.
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This paper discusses the architecture and reviews the development of the RADSPEED™ DSP. It illustrates planned board solutions and briefly highlights the other critical components needed such as regulators, bridges to the rest of the spacecraft and high performance memory. The paper describes the various algorithm elements that may apply to the application classes and compiles information on RADSPEED algorithm elements. Lessons learned from development and translation of algorithms from single string to multi-processing elements using the supporting tools are given. For the many spaceborne processing applications that fit onto this architecture, the RADSPEED DSP provides a very high performance / power solution that will scale with the needs of the application.

Published in:

Aerospace Conference, 2012 IEEE

Date of Conference:

3-10 March 2012

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