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A new approach for obtaining all logic gates using Chua's circuit with fixed input/output levels

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4 Author(s)
Rizk, M.R.M. ; EE Dept., Alexandria Univ., Alexandria, Egypt ; Nasser, A.A. ; El-Badawy, E.-S.A. ; Abou-Bakr, E.

This paper presents a universal logic gate to perform all logic functions, namely, AND, OR, NAND, NOR, and XOR operations without changing the circuit topology. The basic advantage behind our scheme is that there is no need for level conversion between logic levels at the gate terminals (direct hardwiring). The circuit used for verifying the above functions is the Chua's circuit (continuous time domain). VHDL-AMS verification is included to show the validity of the proposed gate.

Published in:

Electronics, Communications and Computers (JEC-ECC), 2012 Japan-Egypt Conference on

Date of Conference:

6-9 March 2012