A D-Band Passive Imager in 65 nm CMOS

Adifferential D-band (140 GHz) passive imager has been demonstrated in a 65 nm CMOS technology. It achieves a minimum noise equivalent power of
$26~{\rm fW}/\sqrt{\rm Hz}$
with peak responsivity of 1.2 MV/W. The core circuit consumes chip area of
$950 \times 240~\mu {\rm m}^{2}$
with dc power consumption of 152 mW. This work further pushes imagers in CMOS technology working towards higher millimeter wave/sub millimeter wave frequencies.