By Topic

Simulations of Damage, Crack Initiation, and Propagation in Interlayer Dielectric Structures: Understanding Assembly-Induced Fracture in Dies

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$33 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

5 Author(s)
Abhishek Tambat ; School of Mechanical Engineering, Purdue University, West Lafayette , IN, USA ; Hung-Yun Lin ; Ganesh Subbarayan ; Dae Young Jung
more authors

Performance enhancement by lowering the dielectric constant of interlayer dielectric (ILD) materials often compromises the mechanical integrity of the dielectric stack. At the present time, fracture in the ILD stacks induced by assembly to either an organic substrate or a die stack (3-D) is an important reliability consideration. These interactions include what is popularly referred to as the chip-package interactions. In this paper, we develop insights on the potential crack initiation site within the ILD, die-substrate geometrical parameters that cause most damage, as well as insights on the manufacturing process that is critical to failure. Towards this end, we utilize analytical models based on classical elasticity theory as well as sophisticated numerical techniques that are capable of nucleating and propagating cracks at arbitrary locations within the structure without remeshing. Specifically, we analytically estimate the strength of singularities at all the possible multimaterial corners in the ILD stack to provide insight on the likely damage nucleation sites for various material configurations in the ILD stack. Two novel numerical approaches are used for fracture simulation. In the first, cracks are modeled as discontinuous enrichments over an underlying continuous behavioral approximation. In the second approach, the underlying material description is enriched with a cohesive damage description whose stiffness is evolved according to a prescribed damage law. Multilevel finite-element models are used to determine the load imposed on the ILD structure by the substrate. Maximum damage induced in the ILD stack by the above load is used as an indicator of the reliability risk. Parametric simulations are conducted by varying ILD material, die size, die thickness, as well as the solder material. Through analytical models of bonded assemblies, we identify groups of relevant dimensionless parameters to relate the numerically estimated damage in ILD stacks to the d- e/substrate material and geometrical parameters. We demonstrate that the damage in the ILD stack is least when the flexural rigidity of the die is matched to that of the assembled substrate. We also demonstrate that ILD damage is only weakly correlated to shear deformation on the die surface due to assembly. We generalize the above observations into mathematical fits (for use as design rules) relating damage in ILD stacks to ILD material choice, relative substrate flexural rigidity, and die size.

Published in:

IEEE Transactions on Device and Materials Reliability  (Volume:12 ,  Issue: 2 )