By Topic

Aggregates: using design patterns to create implicitly parallel data structures in C++

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

3 Author(s)
Hudak, D.E. ; Dept. of Comput. Sci., Ohio Northern Univ., Ada, OH, USA ; Baughman, N. ; Hodges, G.

Small-scale parallel platforms have become prevalent in the marketplace. These machines feature globally shared address spaces, complex kernels and an emphasis on throughput-based parallelism. These new platforms require new tools for concurrent programming. Programs written for these new platforms must be efficient, portable and adaptable to differing machine conditions. In addition, programming environments for these new platforms should integrate concurrency into the design process in order to exploit the multiple processors for speedup when sufficient workloads arise. This functionality can be effectively embedded at the framework/API level. Efficient design of these features can be facilitated using object-oriented design techniques known as design patterns. To illustrate these concepts, we developed a framework called aggregates. Aggregates are a suggested replacement for arrays, linked lists, or other structures for holding large collections of C++ objects. Aggregates use run-time partitioning to support concurrent application of a member function to all objects in the aggregate. Experimental results on a single-processor Windows NT system and a multiprocessor Silicon Graphics Power Challenge have demonstrated a single program using aggregates performed comparably to traditional arrays and linked lists in a single processor environment while providing speedup in a multiple processor environment

Published in:

Aerospace and Electronics Conference, 1997. NAECON 1997., Proceedings of the IEEE 1997 National  (Volume:1 )

Date of Conference:

14-18 Jul 1997