Close category search window
 

Towards low-cost soft error mitigation in SRAM-based FPGAs: A case study on AT40K

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

3 Author(s)
Ferron, J.B. ; TIMA Lab., UJF, Grenoble, France ; Anghel, L. ; Leveugle, R.

Soft errors in the configuration memory of SRAM-based FPGAs cause significant and remanent application disturbances. Typical mitigation techniques induce large overheads in terms of resource usage and power consumption. We propose a new approach achieving efficient trade-offs between robustness and overheads, applied to the internal architecture of commercial AT40K devices.

Published in:
Circuits and Systems (LASCAS), 2012 IEEE Third Latin American Symposium on

Date of Conference: Feb. 29 2012-March 2 2012

Need Help?


IEEE Advancing Technology for Humanity About IEEE Xplore | Contact | Help | Terms of Use | Nondiscrimination Policy | Site Map | Privacy & Opting Out of Cookies

A not-for-profit organization, IEEE is the world's largest professional association for the advancement of technology.
© Copyright 2013 IEEE - All rights reserved. Use of this web site signifies your agreement to the terms and conditions.