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Effects of single-electron transistor parameter variations on hybrid circuit design

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3 Author(s)

A behavioral model for the single-electron transistor (SET) that includes variations for the tunneling resistance is introduced. The resulting model is recast in a closed analytical form that expresses the characteristics of the single-electron transistor and it is implemented in a Verilog-A module to be used in hybrid simulation of MOS-SET circuits. Model generation has been achieved by using a piecewise linear techniques.

Published in:

Circuits and Systems (LASCAS), 2012 IEEE Third Latin American Symposium on

Date of Conference:

Feb. 29 2012-March 2 2012