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Worst-case delay analysis of Variable Bit-Rate flows in network-on-chip with aggregate scheduling

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3 Author(s)
Jafari, F. ; KTH R. Inst. of Technol., Stockholm, Sweden ; Jantsch, A. ; Zhonghai Lu

Aggregate scheduling in routers merges several flows into one aggregate flow. We propose an approach for computing the end-to-end delay bound of individual flows in a FIFO multiplexer under aggregate scheduling. A synthetic case study exhibits that the end-to-end delay bound is up to 33.6% tighter than the case without considering the traffic peak behavior.

Published in:

Design, Automation & Test in Europe Conference & Exhibition (DATE), 2012

Date of Conference:

12-16 March 2012