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Wafer-level high density integration of surface mount technology components in through-silicon trenches

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5 Author(s)
Ji Hao Hoo ; Univ. of Washington, Seattle, WA, USA ; Kwang Soon Park ; Varel, C. ; Baskaran, R.
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This paper reports a novel method to deliver and assemble standard 01005 format (0.016” × 0.008”, 0.4 mm × 0.2 mm) monolithic ceramic capacitors and thin-film resistors into through-wafer trenches, with a batch assembly process that can guarantee 100% assembly. This process is CMOS compatible and is competitive with capacitors and resistors fabricated through standard foundry processes.

Published in:

Micro Electro Mechanical Systems (MEMS), 2012 IEEE 25th International Conference on

Date of Conference:

Jan. 29 2012-Feb. 2 2012

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