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This paper first reports 3-D wiring across vertical sidewalls for summing the voltage of Si photo cells fabricated based on the photolithography. Si photo cells on the buried oxide are isolated each other by the buried oxide layer and the Si etching of the device layer. Wiring using the vertical sidewalls minimizes the shadow region caused by the metal electrode. The techniques of the spray coating of the photoresist and the angled exposure through the absorbent liquid are applied. 10×10 array of cells with 100-μm spans are connected in series generating 10.1V.