Close category search window
 

Simulation Study of Dominant Statistical Variability Sources in 32-nm High- \kappa /Metal Gate CMOS

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

6 Author(s)
Xingsheng Wang ; Device Modelling Group, Univ. of Glasgow, Glasgow, UK ; Roy, G. ; Saxod, O. ; Bajolet, A.
more authors

Comprehensive 3-D simulations have been carried out and compared with experimental data highlighting the dominant sources of statistical variability in 32-nm high-κ/metal gate MOSFET technology. The statistical variability sources include random discrete dopants, line edge roughness, and metal gate granularity. Their relative importance is highlighted in the numerical simulations. Excellent agreement is achieved between the simulated and measured standard deviation of the threshold voltage.

Published in:
Electron Device Letters, IEEE  (Volume:33 ,  Issue: 5 )

Date of Publication: May 2012

Need Help?


IEEE Advancing Technology for Humanity About IEEE Xplore | Contact | Help | Terms of Use | Nondiscrimination Policy | Site Map | Privacy & Opting Out of Cookies

A not-for-profit organization, IEEE is the world's largest professional association for the advancement of technology.
© Copyright 2013 IEEE - All rights reserved. Use of this web site signifies your agreement to the terms and conditions.