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An Ultra-low Power Symbol Detection Methodology and Its Circuit Implementation for a Wake-up Receiver in Wireless Sensor Nodes

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3 Author(s)
Meher, D.K. ; Dept. of E&ECE, IIT Kharagpur, Kharagpur, India ; Salimath, A. ; Halder, A.

An RF envelope detector (ED) and an asynchronous latching circuit have been designed for a wake-up receiver in 400 MHz MICS and 433 MHz / 915 MHz ISM band. The architecture is designed to tolerate significant process, supply-voltage and temperature variations. An alternative bit encoding technique has been used, which eliminates the need for symbol synchronization and the associated circuitry. The power consumption of the entire circuit, which is designed using 1.8 V supply voltage and 180 nm CMOS process, is limited to 43 uW during symbol detection and is limited to 34 uW when no input signal activity is present in the receiver RF front-end. For an input current swing of ±3 μA from the RF front-end, the circuit successfully detects up to a 2.5 Mbps input data rate.

Published in:

VLSI Design (VLSID), 2012 25th International Conference on

Date of Conference:

7-11 Jan. 2012