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A 6-GHz all-digital fractional- frequency synthesizer using an FIR-embedded noise filtering technique is presented. This noise filtering technique is realized in the digital domain without multiple matched analog components. This fractional- frequency synthesizer is fabricated in a 90-nm CMOS process, and it occupies 0.18 . Its power is 28.8 mW with a supply of 1.2 V. The measured out-of-band phase noise at an offset of half the reference frequency is improved by more than 13 dB around 6 GHz considering cancellation variations for different output frequencies.
Circuits and Systems II: Express Briefs, IEEE Transactions on (Volume:59 , Issue: 5 )
Date of Publication: May 2012