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Endurance-aware circuit designs of nonvolatile logic and nonvolatile sram using resistive memory (memristor) device

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7 Author(s)
Meng-Fan Chang ; Department of Electrical Engineering, National Tsing Hua University, Hsinchu, Taiwan 300 ; Ching-Hao Chuang ; Min-Ping Chen ; Lai-Fu Chen
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The use of low voltage circuits and power-off mode help to reduce the power consumption of chips. Non-volatile logic (nvLogic) and nonvolatile SRAM (nvSRAM) enable a chip to preserve its key local states and data, while providing faster power-on/off speeds than those available with conventional two-macro schemes. Resistive memory (memristor) devices feature fast write speed and low write power. Applying memristors to nvLogic and nvSRAMs not only enables chips to achieve low power consumption for store operations, but also achieve fast power-on/off processes and reliable operation even in the event of sudden power failure. However, current memristor devices suffer from limited endurance, which influences the design of the circuit structure for memristor-based nvLogic and nvSRAM. Moreover, previous nvLogic/nvSRAM circuits cannot achieve low voltage operation. This paper explores various circuit structures for nvLogic and nvSRAM, taking into account memristor endurance, especially for low-voltage applications.

Published in:

17th Asia and South Pacific Design Automation Conference

Date of Conference:

Jan. 30 2012-Feb. 2 2012