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The phase-sensitive or `lock-in` amplifier is a fundamental tool in experimental physics, and is able to extract exceedingly small signals in the presence of noise. Recently, there has been some interest in portable or embedded lock-in amplifiers for instrumentation and sensing. One difficulty with digital lock-ins is the required degree of numerical precision. Presented is a fast algorithm for combined phase-sensitive multiplication and filtering. It exploits symmetry to reduce the number of arithmetic operations, and is suitable for low-power embedded devices. As well as being computationally much simpler than a direct digital implementation, the results presented show that it yields a lower error in the estimation of the underlying signal amplitude.