By Topic

VAX hardware for the proposed IEEE floating-point standard

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$33 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

2 Author(s)
Taylor, George S. ; Computer Science Division, University of California Berkeley, California 94720 ; Patterson, D.A.

The proposed IEEE floating-point standard has been implemented in a substitute floating-point accelerator for the VAX∗∗ 11/780. We explain how features of the proposed standard influenced the design of the new processor. By comparing it with the original VAX accelerator, we illustrate the differences between hardware for the proposed standard and hardware for a more traditional floating-point architecture.

Published in:

Computer Arithmetic (ARITH), 1981 IEEE 5th Symposium on

Date of Conference:

16-19 May 1981