Skip to Main Content
An RF LDMOS high power amplifier operating at WCDMA downlink frequency of 2140 MHz for base station application is presented. The quiescent operating point was determined by DC simulation and then the corresponding simple and practical bias circuit composed of 1/4λ microstrip lines and bypass capacitors was designed. A load-pull simulation method was used to obtain the optimal input and output impedances of the LDMOS transistor, and the matching networks were designed by means of microstrip lines and parallel capacitors. The simulation results show that the output power at 1dB compression (P1dB) is 53.58 dBm (230 W), the maximum power added efficiency (PAE) and power gain are 60.86% and 19.27 dB respectively. The IMD3 is less than -36dBc with a 2-tone test at the output power of 47.58dBm.