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A 60GHz power amplifier (PA) is presented, using a 90-nm RF-CMOS process with 8 metal-layers. To the inductor provided by process, the Quality factor (Q value) is quite low and the model is inaccurate in millimeter-wave (MMW) design. Transmission lines (T-lines) can be modeled directly due to their inherent scalability in width and length, which is easy to realize accurate values of small reactance by T-lines. This paper uses coplanar waveguide (CPW) to realize accurate values of small reactance as well as the interconnect lines. The amplifier operates at a 1.1 V supply with 9.56 dB of power gain. The output 1dB compression point (P1dB) is +8.04 dBm with 10.2% of Power Add Efficiency (PAE), and the saturation output power (PSAT) is +11.48 dBm at 60GHz. Besides, the 3dB-band is more than 8.6 GHz (54.88 GHz-63.53 GHz). The chip occupies an area of 1099 μm × 433 μm.