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Automatic compilation flow for a coarse-grained reconfigurable processor

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3 Author(s)
Hao Wang ; Sch. of Microelectron., Shanghai Jiao Tong Univ., Shanghai, China ; Weiguang Sheng ; Weifeng He

Reconfigurable processor is widely used in multimedia applications. Its performance depends not only on good hardware design but also on compilers that can quickly create efficient configurations. This paper describes an automatic compilation flow for REmus-a coarse-grained reconfigurable processor. The front-end of the compiler extracts code sections with high parallelism degree from the application and generates corresponding DFGs (data flow graph). The back-end of the compiler maps the DFGs onto the reconfigurable computing array. The suitability of the compiler for the target application domain is illustrated with code samples of MPEG-2. Experimental results indicate that the compilation flow can map the C code onto REmus automatically and 4.49× to 6.23× speed-up is achieved in comparison with implementation of general-purpose processor.

Published in:

ASIC (ASICON), 2011 IEEE 9th International Conference on

Date of Conference:

25-28 Oct. 2011

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