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A thermal model for the top layer of 3D integrated circuits considering through silicon vias

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4 Author(s)
Fengjuan Wang ; Sch. of Microelectron., Xidian Univ., Xi''an, China ; Zhangming Zhu ; Yintang Yang ; Ning Wang

Based on the analytical thermal model for the top layer of three-dimensional integrated circuits (3D ICs) without through silicon vias (TSVs), the corresponding analytical thermal model taking TSVs into account is proposed. TSVs density ρ and effective thermal conductivity is introduced in this paper. The simulation results show that, the temperature increases sharply with the decrease of ρ for more layers and smaller ρ, and the best range of TSVs density ρ is 0.5% to 1% for an 8-layer 3D IC. These results can be effectively used as design guidelines in 3D IC thermal management studies.

Published in:

ASIC (ASICON), 2011 IEEE 9th International Conference on

Date of Conference:

25-28 Oct. 2011