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A high performance and low cost video processing SoC for digital HDTV systems

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6 Author(s)
Longjun Liu ; Sch. of Electron. & Inf. Eng., Xi''an Jiaotong Univ., Xi''an, China ; Hongbin Sun ; Wenzhe Zhao ; Zuoxun Hou
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This paper proposes a video processing SoC for Flat Panel Displays and describes the employed video processing algorithms. Three key techniques integrated in the proposed chip are introduced, including spatio-temporal adaptive TV decoder, square-nonlinear interpolation scaler and efficient memory controller. The overall video processing architecture is fabricated at 0.18um CMOS technology node, and the IC is extensively evaluated in a prototype HDTV Set. The proposed SoC chip can well supports both SDTV and HDTV signals, while providing high quality images.

Published in:

ASIC (ASICON), 2011 IEEE 9th International Conference on

Date of Conference:

25-28 Oct. 2011