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Application Space Exploration of a Heterogeneous Run-Time Configurable Digital Signal Processor

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10 Author(s)
Rossi, D. ; Adv. Res. Center on Electron. Syst. for Inf. & Commun. Technol. E. De Castro (ARCES), Univ. of Bologna, Bologna, Italy ; Mucci, C. ; Campi, F. ; Spolzino, S.
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This paper describes the application space exploration of a heterogeneous digital signal processor with dynamic reconfiguration capabilities. The device is built around three reconfigurable engines featuring different flavours and computation granularities that make it suitable for a wide range of signal processing application domains such as video coding, image processing, telecommunications, and cryptography. Performance of signal processing applications is evaluated from measurements performed on a CMOS 90 nm prototype. In order to characterize the application space of the processor, performance is compared with state-of-the-art devices, taking programmability, computational capabilities, and energy efficiency as the main metrics. The device exploits performance and energy efficiency significantly more than general purpose processors, while still maintaining a user-friendly programming approach that mainly relies on software-oriented languages. The device is able to achieve 1.2 to 15 GOPS with an energy efficiency from 2 to 50 GOPS/W when running the selected applications.

Published in:

Very Large Scale Integration (VLSI) Systems, IEEE Transactions on  (Volume:21 ,  Issue: 2 )

Date of Publication:

Feb. 2013

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