A Low-Power, High-Fidelity Stereo Audio Codec in 0.13 $\mu$m CMOS

A 1.5 V low-power stereo audio codec in 0.13 μm CMOS is described. The microphone path includes a programmable gain stage with an enhanced transconductance cell followed by a continuous-time ΣΔ ADC with capacitive feed-forward and capacitive direct feedback. The speaker path employs a 1 mA Class-AB speaker amplifier with an improved quiescent current control circuit that delivers 30 mW to a 32 Ω speaker. The audio input and output paths achieve 92 and 98 dB dynamic range, respectively, with 6.5 mA total quiescent current.