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Testing large analog/digital signal processing chips

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1 Author(s)
S. Freeman ; David Sarnoff Res. Center Inc., Princeton, NJ, USA

An approach to testing VLSI chips with analog IO and internal digital signal processing has been successfully demonstrated in several custom designs. Functional testing of analog circuitry was combined with high fault coverage digital testing by use of a multipurpose test bus. The approach provides at-speed tests of functional character, which are to be preferred for timing verification as well as for test thoroughness and device reliability. Analog interfaces and severe pin limitations can be accommodated, and no performance degradation need be accepted

Published in:

IEEE Transactions on Consumer Electronics  (Volume:36 ,  Issue: 4 )