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We have been developing a novel X-ray astronomy detector combined with a CMOS readout circuit on a monolithic chip using the SOI CMOS technology. As a part of the development, we have fabricated a prototype of an analog-to-digital converter (ADC) component aiming for building it into the detector itself. We used the OKI 0.2 μm CMOS fully depleted Silicon-On-Insulator process. The prototype ADC consists of a pre-amplifier and two delta-sigma (ΔΣ) modulators. The two modulators process a series of analog input signal alternately to improve the readout speed (~100 kHz), and output the digital bit-stream signal. An external Field Programmable Gate Array works as a decimation filter and converts the bit-stream signal into a 12-bit digital signal. We evaluated the prototype ADC and obtained the first results as follows: the power consumption of 40 mW, the equivalent input noise of ~80 μV rms, and the integral non-linearity of less than 0.8%.