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We report on the design of an integrated circuit called PXD18k dedicated for readout of hybrid pixel semiconductor detectors used for X-ray imaging applications. The PXD18k has dimensions of 9.64 mm × 20 mm and is designed in CMOS 180 nm technology. The core of the IC is a matrix of 96×192 pixels with 100 μm ×100 μm pixel size working in a single photon counting mode. Each pixel contains two charge sensitive amplifiers with Krummenacher feedback scheme, two shapers, two discriminators (with independent threshold A and B) and two 16-bit ripple counters. To minimize the effective threshold spread, one 7-bit and one 5-bit trim DACs are used in each pixel for correction of threshold A and threshold B respectively. The data are read out via 8 LVDS outputs with 100 Mbps rate. The power consumption is dominated by the analog blocks and it is about 23 μW/pixel. The effective peaking time at the discriminator input is 30 ns and it is mainly determined by the time constants of the CSA. The gain is equal to 42.5 μV/e- and an Equivalent Noise Charge with bump-bonded detector is 168 e- rms. The effective threshold spread at the discriminator input is only 1.79 mV (at one sigma level, with 7-bit trim DACs enabled). The count rate per pixel depends on the effective CSA feedback resistance and for a standard setting a dead time of the front-end electronics is 172 ns (paralyzable model). The PXD18k IC works with two energy thresholds in the readout mode separate from exposure. When operating with two different energy thresholds, acquisition and readout are interleaved and the readout dead time is 740 μs. The PXD18k can also operate in a continuous readout mode with zero dead time and one can select the number of bits readout from each pixel to optimize the IC frame rate. For example for reading out 16 bits/pixel the frame rate is 2.7 kHz and for 4 bits/pixel it rises up to 7.1 kHz.