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Future neutrino physics experiments intend to use unprecedented volumes of liquid argon to fill a time projection chamber in an underground facility. To increase performance, integrated readout electronics should work inside the cryostat. Due to the scale and cost associated with evacuating and filling the cryostat, the electronics will be unserviceable for the duration of the experiment. Therefore, the lifetimes of these circuits must be well in excess of 20 years. The principle mechanism for lifetime degradation of MOSFET devices and circuits operating at cryogenic temperatures is via hot carrier degradation. Choosing a process technology that is, as much as possible, immune to such degradation and developing design techniques to avoid exposure to such damage are the goals. This requires careful investigation and a basic understanding of the mechanisms that underlie hot carrier degradation and the secondary effects they cause in circuits. In this work, commercially available 130nm nMOS transistors operating at cryogenic temperatures are investigated. The results show that the difference in lifetime for room temperature operation and cryogenic operation for this process are not great and the lifetimes at both 300K and at 77K can be projected to more than 20 years at the nominal voltage (1.5V) for this technology.