By Topic

A Novel High-Voltage ( > 600 V) LDMOSFET With Buried N-Layer in Partial SOI Technology

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$33 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

5 Author(s)
Yue Hu ; School of Physics and Technology, Wuhan University, Wuhan, China ; Qijun Huang ; Gaofeng Wang ; Sheng Chang
more authors

A novel lateral double-diffused metal-oxide-semiconductor (LDMOS) field-effect transistor with a buried N-type layer (BNL) in partial silicon-on-insulator (PSOI) is introduced to achieve breakdown voltage (BV) above 600 V and reduce on-resistance (Ron). The BNL induces enhanced voltage into the buried oxide layer, which results in higher BV. The higher doping concentration in the BNL can provide more electrons to support higher current and thus reduce on-resistance. The proposed LDMOS transistor with a BNL in PSOI (BNL-PSOI) is analyzed and compared with LDMOS transistors with conventional SOI (CSOI), conventional PSOI (CPSOI), and a BNL in SOI (BNL-SOI) by 2-D numerical simulations. The results indicate that the proposed structure can significantly improve BV up to 660 V and reduce on-resistance by 13.6%-15.5% in comparison to CSOI and CPSOI.

Published in:

IEEE Transactions on Electron Devices  (Volume:59 ,  Issue: 4 )