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Three-Level Cell Topology for a Multilevel Power Supply to Achieve High Efficiency Envelope Amplifier

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7 Author(s)
Diaz, D. ; Centre of Electron., Ind. of the Univ. Politec. de Madrid, Madrid, Spain ; Vasic, M. ; Garcia, O. ; Oliver, J.A.
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This paper presents an envelope amplifier solution for envelope elimination and restoration (EER), that consists of a series combination of a switch-mode power supply (SMPS), based on three-level voltage cells and a linear regulator. This cell topology offers several advantages over a previously presented envelope amplifier based on a different multilevel topology (two-level voltage cells). The topology of the multilevel converter affects to the whole design of the envelope amplifier and a comparison between both design alternatives regarding the size, complexity and the efficiency of the solution is done. Both envelope amplifier solutions have a bandwidth of 2 MHz with an instantaneous maximum power of 50 W. It is also analyzed the linearity of the three-level cell solution, with critical importance in the EER technique implementation. Additionally, considerations to optimize the design of the envelope amplifier and experimental comparison between both cell topologies are included.

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Circuits and Systems I: Regular Papers, IEEE Transactions on  (Volume:59 ,  Issue: 9 )