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Demonstration of Split-Gate Type Trigate Flash Memory With Highly Suppressed Over-Erase

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12 Author(s)
Takahiro Kamei ; School of Science and Technology, Meiji University, Kawasaki, Japan ; Yongxun Liu ; Takashi Matsukawa ; Kazuhiko Endo
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The functional split-gate type trigate flash memory cell transistors have successfully been fabricated for the first time, and their threshold voltage (Vt) variations before and after NOR-mode program/erase cycle have systematically been compared with the stack-gate ones. It was experimentally found that split-gate type cell transistors with the same control gate length (LCG) of 176 nm show much smaller Vt distribution after erase compared to those of stack-gate ones. Moreover, the measured source-drain breakdown voltage (BVDS) is higher than 3.1 V even the LCG was down to 76 nm. This indicates that the developed split-gate type trigate flash memory is very effective for scaled NOR-type flash memory with highly suppressed over-erase.

Published in:

IEEE Electron Device Letters  (Volume:33 ,  Issue: 3 )