Scheduled System Maintenance:
On May 6th, single article purchases and IEEE account management will be unavailable from 8:00 AM - 5:00 PM ET (12:00 - 21:00 UTC). We apologize for the inconvenience.
By Topic

Overview on ATE Test and Debugging Methods for Asynchronous Circuits

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

4 Author(s)
Wolf, C. ; IHP, Frankfurt (Oder), Germany ; Zeidler, S. ; Krstic, M. ; Kraemer, R.

Due to mature design tools and proven flows for design and test the majority of today's circuits are synchronous. Increasingly complex designs pose major problems though with respect to clock tree design, interfaces running at different frequencies, peak current consumption and electromagnetic interference. The asynchronous design style promises advantages in these areas but is not widely accepted, mainly due to the lack of design tool support and testability issues. This paper summarizes the problems regarding the test of asynchronous designs as well as existing test methodologies and presents our strategy to increase testability of this kind of devices.

Published in:

Microprocessor Test and Verification (MTV), 2011 12th International Workshop on

Date of Conference:

5-7 Dec. 2011