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Interfacing 16-bit 1-MSPS CMOS ADC to FPGA based signal processing card

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2 Author(s)
Priya Gupta ; Department of Electronics and Communication, MRIU Faridabad, India ; Nitesh Kumar

The purpose of this paper is to describe the interfacing of 16-bit 1-MSPS CMOS ADC to FPGA based signal processing card. An on board real time digital signal processing system is designed using FPGA, the architecture and the state-of-the art of the Field Programmable Gate Arrays (FPGAs) make them especially suitable to act as interface between an high speed ADC and a data processing unit. The platform can decode process of various kinds of digital and analog signals simultaneously For the optimum performance a 16 bit 1 MSPS ADC is interfaced with FPGA to make all the data processing onboard in real time[1] The Virtex4-SX FPGAs offer designers a low cost and feature rich platform for interfacing with high speed Analog to Digital Converters (ADCs). Interfacing high speed ADCs can present several challenges to designers including: DDR to SDR Conversion, LVDS Buffers, Tight Timing Margins, and High Data Rates in FPGA[5].As the need for data bandwidth increases for end systems, data transmission rates continue to increase for Analog to Digital Converters (ADC) and the associated FPGA solution to interface to the ADCs and other parts of the system.AD7671 features a very high sampling rate mode (Warp) and, for asynchronous conversion rate applications, a fast mode (Normal) and, for low power applications, a reduced power mode (Impulse) where the power is scaled with the throughput[8]. It is fabricated using Analog Devices high-performance, 0.6 micron CMOS process, with correspondingly low cost.

Published in:

Information and Communication Technologies (WICT), 2011 World Congress on

Date of Conference:

11-14 Dec. 2011