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ACTIV-LOCSTEP: a test generation procedure based on logic simulation and fault activation

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2 Author(s)
I. Pomeranz ; Dept. of Electr. & Comput. Eng., Iowa Univ., Iowa City, IA, USA ; S. M. Reddy

We present a test generation procedure for synchronous sequential circuits referred to as ACTIV-LOCSTEP. Like its predecessor LOCSTEP, ACTN-LOCSTEP generates test sequences at low computational costs by using randomized search and avoiding fault oriented test generation. However, ACTIV-LOCSTEP is fundamentally different from LOCSTEP, being based on the following observation. Consider an input sequence C that consists of a transient C/sub 1/, followed by a periodic part C/sub 2/ that takes the fault free circuit through a cycle of states. Suppose that a fault f is activated during the cycle. If the same input sequence does not create a cycle in the faulty circuit, or creates a cycle of a different length than the one traversed by the fault free circuit, then f is likely to be detected after several repetitions of C/sub 2/ In the resulting procedure, the test sequence length is controlled by restricting the length of the input sequence C and the number of repetitions of the periodic part. Our experiments indicate that relatively short sequences and small numbers of repetitions of the periodic part of the sequence allow large numbers of faults to be detected.

Published in:

Fault-Tolerant Computing, 1997. FTCS-27. Digest of Papers., Twenty-Seventh Annual International Symposium on

Date of Conference:

24-27 June 1997