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Look-Up Table Implementation of a Slow Envelope Dependent Digital Predistorter for Envelope Tracking Power Amplifiers

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2 Author(s)
Pere L. Gilabert ; Department of Signal Theory and Communications, Universitat Politècnica de Catalunya (UPC), Barcelona, Spain ; Gabriel Montoro

This letter presents a dynamic slow envelope dependent digital predistorter (SED-DPD) capable of compensating for the nonlinear distortion and memory effects that arise in envelope tracking (ET) power amplifiers (PAs) when using a slow version of the signal's envelope to dynamically supply the PA drain voltage. Moreover, a new DPD architecture based on the combination of several basic predistortion cells (BPCs) is presented to allow the FPGA implementation of the proposed SED-DPD. Finally, results showing the necessity and linearization performance of the proposed dynamic SED-DPD are provided.

Published in:

IEEE Microwave and Wireless Components Letters  (Volume:22 ,  Issue: 2 )