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F-Timer: dedicated FPGA to real-time systems design support

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6 Author(s)
A. Parisoto ; Electr. Eng. Dept., Univ. Federal do Rio Grande do Sul, Porto Alegre, Brazil ; A. Souza ; L. Carro ; M. Pontremoli
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This paper presents a hardware architecture and its FPGA implementation for real-time operating systems support. Dedicated hardware units are responsible for the maintenance of a 32 tasks list organized by time priority. The co-processor also communicates with the microprocessor to program interrupt modes and tasks. This dedicated HW architecture was easily prototyped in modern FPGAs, being a cost-effective solution to free microcontrollers from the burden of task time management. The FPGA has been completely synthesized based on a HDL description, allowing its use as a macrocell in larger designs. The task resolution is of 100 μs

Published in:

Real-Time Systems, 1997. Proceedings., Ninth Euromicro Workshop on

Date of Conference:

11-13 Jun 1997