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Designing processors using MAsS, a modular and lightweight instruction-level exploration tool

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4 Author(s)
Matthieu Texier ; CEA, LIST, Embedded Computing Laboratory - PC94 F91191 Gif sur Yvette - France ; Erwan Piriou ; Mathieu Thevenin ; Raphaël David

As application complexity increases, the design of efficient computing architectures able to cope with embedded constraints requires a fine algorithm analysis. This paper proposes an original approach based on Modular Assembly Simulator (MAsS) tool that allows Design Space Exploration (DSE) for programmable processors. The originality of the method resides in its capacity to generate operator level simulators allowing a quick code analysis from real data sets. This paper also presents two successfully designed architectures using MAsS.

Published in:

Design and Architectures for Signal and Image Processing (DASIP), 2011 Conference on

Date of Conference:

2-4 Nov. 2011