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An ultra-low voltage switched-capacitor (SC) ΔΣ converter running at a record low supply voltage of only 250 mV is introduced. System level aspects are discussed and special circuit techniques described, that enable robust operation at such a low supply voltage. Using a SC biasing approach, inverter-based integrators are realized with overdrives close to the transistor threshold voltage Vth while compensating for process, voltage and temperature (PVT) variation. Biasing voltages are generated on-chip using a novel level shifting circuit, that overcomes headroom limitations due to saturation voltage Vsat. With an oversampling ratio (OSR) of 70 and a sampling frequency (fS) of 1.4 MHz at 250 mV power supply the converter achieves 61 dB SNDR in 10 kHz bandwidth while consuming a total power of 7.5 μW.
Published in:
Solid-State Circuits, IEEE Journal of
(Volume:47
,
Issue:
3
)
Date of Publication: March 2012
- Page(s):
- 709 - 721
- ISSN :
- 0018-9200
- INSPEC Accession Number:
- 12543300
- Digital Object Identifier :
- 10.1109/JSSC.2011.2179732
- Product Type:
- Journals & Magazines
- Date of Publication :
- 23 January 2012
- Date of Current Version :
- 20 February 2012
- Issue Date :
- March 2012
- Sponsored by :
- IEEE Solid-State Circuits Society
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