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System interconnect design exploration for embedded MPSoCs

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6 Author(s)
Chen-Ling Chou ; Electrical and Computer Engineering, Carnegie Mellon University ; Radu Marculescu ; Umit Ogras ; Satrajit Chatterjee
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This paper presents a new approach for system interconnect design exploration of application-specific multi-processor systems-on-chip (MPSoCs). As a novel contribution, we develop an analytical model for network-based communication design space exploration and generate fabric solutions with optimal cost-performance trade-offs, while considering various design constrains, such as power, area, and wirelength. For large systems, we also propose an efficient approach for obtaining competitive solutions with significant less computation time compared to the exhaustive approach. The accuracy of our analytical model is validated via SystemC simulation using several synthetic applications and an industrial SoC design.

Published in:

System Level Interconnect Prediction (SLIP), 2011 13th International Workshop on

Date of Conference:

5-5 June 2011