Modeling of thermal conductivity and thermoelectric power factor in ultrathin SOI nanomembranes and silicon nanowires

Thermoelectric (TE) refrigeration using Si-based nanostructures is an attractive approach for on-chip thermal energy harvesting and targeted cooling of local hotspots [1] due to the ease of on-chip integration and the nanowires' enhanced TE figure of merit [2] ZT=S2σ/(κl+κe) [3]. Silicon-on-insulator (SOI) membranes [4] and membrane-based nanowires [3] and ribbons (Fig. 1) show promise for application as efficient thermoelectrics, which requires both high power factor S2σ (Fig. 2) and low thermal conductivity (Figs. 3-4).