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Local stressors to accommodate 1.2 to 5.6 GPa uniaxial tensile stress in suspended gate-all-around Si nanowire nMOSFETs by elastic local buckling

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4 Author(s)
Najmzadeh, M. ; Nanolab, Swiss Fed. Inst. of Technol. (EPFL), Lausanne, Switzerland ; Bouvet, D. ; Grabinski, W. ; Ionescu, A.M.

In this paper, we demonstrate the integration of local oxidation and metal-gate strain technologies to induce 3.3%/5.6 GPa uniaxial tensile strain/stress in 2 μm long suspended Si nanowire MOSFETs, the highest process-based stress record in MOSFETs until now, by elastic local buckling. Fig. 1 represents the fabrication process to make GAA uniaxially tensile strained Si nanowire MOSFETs from a 100 mm (100) Unibond SOI substrate with 1x1018 cm3 phosphorous channel doping. Highly doped accumulation-mode was chosen as the operation regime to mainly simplify the process in nanoscale. Dry oxidation of the Si nanowires with a tensile Si3N4 hard mask on top at 925οC helps to accumulate mechanical potential energy in the nanowires due to in-plane/out-of-plane elongation/bending restrictions during the oxidation process. This stored mechanical potential energy will be released in the form of mechanical buckling after stripping the hard mask, the grown oxide and the nanowire detachment from the BOX layer. The high-k/metal-gate stack step includes 5 nm ALD HfO2, RTA (600οC, 15 mm) and finally, 50 nm TiN by sputtering at 25οC including -2.0 GPa biaxial compressive intrinsic thin film stress. The thin film stress in the metal-gate layer can be engineered by sputtering power, thickness and deposition temperature. The metal-gate thin film with an intrinsic compressive stress tends to stretch, causing further elongation/buckling of the suspended Si nanowires. Gate pattern, S/D implantation, metallization and sintering are the further process steps.

Published in:

Semiconductor Device Research Symposium (ISDRS), 2011 International

Date of Conference:

7-9 Dec. 2011

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