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SiC MOSFET oxide-trap two-way tunneling model

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4 Author(s)
Lelis, A. ; Sensors & Electron Devices Directorate, U.S. Army Res. Lab., Adelphi, MD, USA ; Habersat, D. ; Green, R. ; Goldsman, N.

This work reports the development of a simultaneous two-way tunneling model, based on an existing one-way tunneling model, to simulate the time-dependent and field-dependent charging and discharging of the near-interfacial oxide traps in response to an applied gate-bias stress. It is important that a two-way model be used, since depending on the electric field in the oxide and the distribution of charged and uncharged traps at a given spatial depth, electrons are likely to be both tunneling in and out simultaneously during a given period of time. This model is applied to both the bias stress periods, as well as during the measurement periods, when the gate-to-source voltage is being ramped.

Published in:

Semiconductor Device Research Symposium (ISDRS), 2011 International

Date of Conference:

7-9 Dec. 2011