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Low-power design techniques with process tagging and dynamic power management

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6 Author(s)
Cooley, D. ; Silicon Labs. Int. Pte., Ltd., Singapore, Singapore ; Rahman, Y. ; Jin Ruan ; Xun Yu
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This paper proposes a power optimization strategy that takes into consideration the effects of operating frequency, process, voltage, and temperature variation (FPVTV) in both analog and digital circuits. Traditional designs set the biasing points to guarantee performance over all working conditions, resulting in wasted power in most instances. By collecting information about FPVTV, the designer can make intelligent decisions to reduce power consumption and extend battery life in mobile products. The proposed optimization strategy was implemented in silicon and successfully proven on an RF/mixed-signal chip with DSP, resulting in a power savings of 11.2% in typical conditions. The usage of such a strategy is discussed, as well as the production flow for gathering process corner information in high volume situations.

Published in:

Integrated Circuits (ISIC), 2011 13th International Symposium on

Date of Conference:

12-14 Dec. 2011