By Topic

1-bit heuristic adaptive quantizer (HAQ) for on chip image compression in CMOS image sensors

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

3 Author(s)
Barrow, M. ; ECE Dept., Hong Kong Univ. of Sci. & Technol., Hong Kong, China ; Bermak, A. ; Shoushun Chen

This paper presents an algorithm for implementing a single bit adaptive quantizer based on fast boundary adaptation rule (FBAR). The peak signal to noise ratio (PSNR) gain and performance gain of the algorithm over prior designs is found to be larger than that displayed by prior art compared with a reference FBAR implementation. A maximum increase of 1.44db was seen. In addition, the new design facilitates an improved bits per pixel ratio (bpp) when integrated with the QTD compressor utilized in previous prototypes. The presented algorithm is hardware friendly and designed for low power implementation, with simulation results also showing an improvement of relative energy cost over previous work. Experimental evidence for image sizes ranging from 64×64 pixels to 512×512 pixels and the heuristic adaptive quantizer (HAQ) algorithm are detailed in this paper.

Published in:

Integrated Circuits (ISIC), 2011 13th International Symposium on

Date of Conference:

12-14 Dec. 2011