By Topic

Low-power 4-bit flash ADC for digitally controlled DC-DC converter

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$33 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

2 Author(s)
Guolei Yu ; VIRTUS - IC Design Center of Excellence, Nanyang Technological University, Singapore 639798 ; Liter Siek

A low-power flash analog-to-digital converter (ADC) using logic gates as comparators is presented. The circuit is designed by using 0.35μm CMOS technology. A conversion delay of 12.55ns has been achieved at 200 Mega sample per second (MSPS). The static current consumptions at zero error bit from the power supply and sampled input are 63μA and 93μA respectively. The high speed and low power characteristic make the ADC structure ideal for the high frequency digitally controlled DC-DC converter applications.

Published in:

2011 International Symposium on Integrated Circuits

Date of Conference:

12-14 Dec. 2011