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We have developed a flat device structure, which we call “FLAT”, with no isolation grooves/ridges and no Si substrate etching in the imaging area of the CMOS Image Sensor (CIS). We employed this FLAT structure to achieve a 1.12 μm pitch pixel CIS with a 1.25 transistor/pixel architecture and excellent image quality. It uses FLAT transistors(Trs) that generate greatly-reduced 1/f noise, and FLAT isolators (Isos) that increase the saturation capacity (Qs) due to increasing both effective photodiode (PD) area and PD potential under low dark current.
Electron Devices Meeting (IEDM), 2011 IEEE International
Date of Conference: 5-7 Dec. 2011